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Sony
HCD-XGR60
User Manual
Sony HCD-XGR60 User Manual
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50
HCD-XGR6/XGR60
6-26. IC BLOCK DIAGRAMS
IC101 CXD3017Q (BD BOARD)
IC102 BA5974FM-E2 (BD BOARD)
1
2
3
10 11 12 13 14 15 16 17 18
19
20
60
59 58 57
56
55
54
52
51
50
49
48
47
46 45 44
53
21
39
40
41
42
43
22
23
79
24
26
25
28
27
29
30
31
32
35
36
37
38
33
34
80
62
61
77
78
75
76
73
74
72
71
70
69
66
65
64
63
68
67
4
5
6
7
8
9
D/A
Interface
Digital
PLL
CPU
Interface
Digital
OUT
Serial-In
Interface
Over Sampling
Digital Filter
Timing
Logic
PWM
3rd-Order
Noise Shaper
PWM
Asymmetry
Corrector
A/D
Converter
OP Amp
Analog SW
Clock
Generator
Digital
CLV
MIRR
DFCT
FOK
SERVO DSP
FOCUS
SERVO
TRACKING
SERVO
SELED
SERVO
EFM
Demodurator
Servo Auto
Sequencer
SERVO
Interface
Error
Corrector
16K
RAM
Sub Code
Processor
PWM
GENERATOR
FOCUS PWM
GENERATOR
TRACKING
PWM
GENERATOR
SLED PWM
GENERATOR
SQSO
SQCK
XRST
DATA
XLAT
CLOK
SENS
SCLK
VDD
SPOA
SPOB
XLON
XPCK
SCOR
COUT
MIRR
DFCT
FOK
LOCK
MDP
SSTP
SFDR
SRDR
TFDR
TRDR
FFDR
FRDR
TEST
TES1
VC
FE
SE
TE
CE
RFDC
ADIO
IGEN
ASYO
ASYI
BIAS
RFAC
CLTV
FILO
FILI
PCO
DOUT
XTAI
XTAO
AVDD1
AOUT1
AIN1
LOUT1
LOUT2
AIN2
AOUT2
LMUT
XVSS
RMUT
SYSM
ATSK
WFCK
XUGF
GFS
C2PO
VSS
XTSL
AVDD
AVSS
AVSS
AVDD
VSS
VDD
LRCK
PCMD
BCK
EMPH
XVDD
AVSS1
AVSS2
AVDD2
LEVEL SHIFT
INTERFACE
INTERFACE
INTERFACE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
20
21
22
23
24
25
26
27
28
19
18
17
16
15
F
R
R
F
F
R
R
F
R
R
F
F
MUTE
THERMAL
SHUTDOWN
VREFOUT
VREFIN
POWVCC
CH1FIN
CH1RIN
CH2FIN
CH2RIN
CH2OUTR
CH2OUTF
CH1OUTR
CH1OUTF
CAP
AIN1
CAP
AIN2
GND
PRFVCC
MUTE
POWVCC
CH4SIN'
CH4SIN
CH4BIN
CH3FIN
CH3RIN
CH3OUTR
CH3OUTF
CH4OUTR
CH4OUTF
CAP
AIN3
GND
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