Intel N475 AU80610006240AA User Manual

Product codes
AU80610006240AA
Page of 85
Signal Description
14
Datasheet
2
Signal Description
This chapter describes the processor signals. They are arranged in functional groups 
according to their associated interface or category. The following notations are used to 
describe the signal type.
The signal description also includes the type of buffer used for the particular signal.
Table 2-1. Signal Types
Notations
Signal Type
I
Input  Pin
O
Output  Pin
I/O
Bi-directional Input/Output Pin
Table 2-2. Signal Description Buffer Types
Signal
Description
CMOS
CMOS buffers. 1.05-V tolerant
DMI
Direct Media Interface signals. These signals are compatible with PCI Express* 
1.0 signalling environment AC specifications but are DC coupled. The buffers are 
not 3.3-V tolerant.
HVCMOS
High Voltage buffers. 3.3-V tolerant
DDR2
DDR2 buffers: 1.8-V tolerant
TAP
Test Access Port signal
Analog
Analog reference or output. May be used as a threshold voltage or for buffer 
compensation
Ref
Voltage reference signal
GTL+
Gunning Transceiver Logic signaling technology. Refer to GTL+ I/O Specification 
for complete details.
Asynch
This signal is asynchronous and has no timing relationship with any reference 
clock.
LVDS
Low Voltage Differential Signalling. A high speed, low power data transmission 
standard used for display connections to LCD panels.
SSTL - 1.8
Stub Series Termination Logic. These are 1.8-V output capable buffers. 1.8-V 
tolerant.