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Intel E5500 AT80571PG0722ML Data Sheet

Product codes
AT80571PG0722ML
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Page of 100
Land Listing and Signal Descriptions
Datasheet
55
C20
DBI3#
Source Synch Input/Output
C21
D58#
Source Synch Input/Output
C22
VSS
Power/Other
 
C23
VCCIOPLL
Power/Other
 
C24
VSS
Power/Other
 
C25
VTT
Power/Other
 
C26
VTT
Power/Other
 
C27
VTT
Power/Other
 
C28
VTT
Power/Other
 
C29
VTT
Power/Other
 
C30
VTT
Power/Other
 
D1
RESERVED
  
D2
ADS#
Common Clock Input/Output
D3
VSS
Power/Other
 
D4
HIT#
Common Clock Input/Output
D5
VSS
Power/Other
 
D6
VSS
Power/Other
 
D7
D20#
Source Synch Input/Output
D8
D12#
Source Synch Input/Output
D9
VSS
Power/Other
 
D10
D22#
Source Synch Input/Output
D11
D15#
Source Synch Input/Output
D12
VSS
Power/Other
 
D13
D25#
Source Synch Input/Output
D14
RESERVED
  
D15
VSS
Power/Other
 
D16
RESERVED
  
D17
D49#
Source Synch Input/Output
D18
VSS
Power/Other
 
D19
DBI2#
Source Synch Input/Output
D20
D48#
Source Synch Input/Output
D21
VSS
Power/Other
 
D22
D46#
Source Synch Input/Output
D23
VCCPLL
Power/Other  
D24
VSS
Power/Other
 
D25
VTT
Power/Other
 
D26
VTT
Power/Other
 
D27
VTT
Power/Other
 
D28
VTT
Power/Other
 
Table 24.
Numerical Land 
Assignment
Land # Land Name Signal Buffer 
Type
Direction
D29
VTT
Power/Other
 
D30
VTT
Power/Other
 
E2
VSS
Power/Other
 
E3
TRDY#
Common Clock
Input
E4
HITM#
Common Clock Input/Output
E5
FC20
Power/Other
 
E6
RESERVED
  
E7
RESERVED
  
E8
VSS
Power/Other
 
E9
D19#
Source Synch Input/Output
E10
D21#
Source Synch Input/Output
E11
VSS
Power/Other
 
E12
DSTBP1#
Source Synch Input/Output
E13
D26#
Source Synch Input/Output
E14
VSS
Power/Other
 
E15
D33#
Source Synch Input/Output
E16
D34#
Source Synch Input/Output
E17
VSS
Power/Other
 
E18
D39#
Source Synch Input/Output
E19
D40#
Source Synch Input/Output
E20
VSS
Power/Other
 
E21
D42#
Source Synch Input/Output
E22
D45#
Source Synch Input/Output
E23
RESERVED
  
E24
FC10
 Power/Other
 
E25
VSS
Power/Other
 
E26
VSS
Power/Other
 
E27
VSS
Power/Other
 
E28
VSS
Power/Other
 
E29
FC26
Power/Other
 
F2
FC5
Power/Other
F3
BR0#
Common Clock Input/Output
F4
VSS
Power/Other
 
F5
RS1#
Common Clock
Input
F6
FC21
Power/Other
F7
VSS
Power/Other
 
F8
D17#
Source Synch Input/Output
F9
D18#
Source Synch Input/Output
F10
VSS
Power/Other
 
Table 24.
Numerical Land 
Assignment
Land # Land Name Signal Buffer 
Type
Direction