Apple II User Manual
2151 EE2E 4E 2A A4 LSR CPIY ;MAKE ROOM FOR MSB
2152 EE31 0D 2A A4 ORA CPIY ;OR IN SIGN BIT
2153 EE34 8D 2A A4 STA CPIY ;REPLACE CHAR
2153 EE34 8D 2A A4 STA CPIY ;REPLACE CHAR
2154 EE37 88 DEY
2155 EE38 D0 F1 BNE GETA1
2155 EE38 D0 F1 BNE GETA1
2156 EE3A 60 RTS
2157 EE3B ;GET ONE BIT FROM TAPE AND
2157 EE3B ;GET ONE BIT FROM TAPE AND
2158 EE3B ;RETURN IT IN SIGN OF A (MSB)
2159 EE3B AD 08 A4 RDBIT LDA TSPEED ;ARE WE IN C7 OR 5B,5A FREQUENC`
2159 EE3B AD 08 A4 RDBIT LDA TSPEED ;ARE WE IN C7 OR 5B,5A FREQUENC`
2160 EE3E 30 27 BMI RDBIT4 ;JUMP TO C7 FREQ FORMAT
2161 EE40 20 75 EE JSR CKFREQ ;START BIT IN HIGH FREQ
2161 EE40 20 75 EE JSR CKFREQ ;START BIT IN HIGH FREQ
2162 EE43 20 75 EE RDBIT1 JSR CKFREQ ;HIGH TO LOW FREQ TRANS
2163 EE46 B0 FB BCS RDBIT1
2163 EE46 B0 FB BCS RDBIT1
2164 EE48 AD 96 A4 LDA DIV64 ;GET HIGH FREQ TIMING
2165 EE4B 48 PHA
2165 EE4B 48 PHA
2166 EE4C A9 FF LDA #$FF ;SET UP TIMER
2167 EE4E 8D 96 A4 STA DIV64
2167 EE4E 8D 96 A4 STA DIV64
2168 EE51 20 75 EE RDBIT2 JSR CKFREQ ;LOW TO HIGH FREQ TRANS
2169 EE54 90 FB BCC RDBIT2 ;WAIT TILL FREQ IS HIGH
2169 EE54 90 FB BCC RDBIT2 ;WAIT TILL FREQ IS HIGH
2170 EE56 68 PLA
2171 EE57 38 SEC
2171 EE57 38 SEC
2172 EE58 ED 96 A4 SBC DIV64 ;(256-T1) - (256-T2) =T2-T1
2173 EE5B 48 PHA ;LOW FREQ TIME-HIGH FREQ TIME
2173 EE5B 48 PHA ;LOW FREQ TIME-HIGH FREQ TIME
2174 EE5C A9 FF LDA #$FF
2175 EE5E 8D 96 A4 STA DIV64 ;SET UP TIMER
2175 EE5E 8D 96 A4 STA DIV64 ;SET UP TIMER
2176 EE61 68 PLA
2177 EE62 49 FF EOR #$FF
2177 EE62 49 FF EOR #$FF
2178 EE64 29 80 AND #$80
2179 EE66 60 RTS
2179 EE66 60 RTS
2180 EE67 ;EACH BIT STARTS WITH HALF PULSE OF 2400 & THEN
2181 EE67 ;3 HALF PULSES OF 1200 HZ FOR 0 ,3 PUSLES OF 2400 FOR 1
2181 EE67 ;3 HALF PULSES OF 1200 HZ FOR 0 ,3 PUSLES OF 2400 FOR 1
2182 EE67 ;THE READING IS MADE ON THE FOURTH 1/2 PULSE ,WHERE
2183 EE67 ;THE SIGNAL HAS STABILIZED
2183 EE67 ;THE SIGNAL HAS STABILIZED
2184 EE67 20 75 EE RDBIT4 JSR CKFREQ ;SEE WHICH FREQ
2185 EE6A 90 FB BCC RDBIT4
2185 EE6A 90 FB BCC RDBIT4
2186 EE6C 20 75 EE JSR CKFREQ
2187 EE6F 20 75 EE JSR CKFREQ
2187 EE6F 20 75 EE JSR CKFREQ
2188 EE72 4C B5 FF JMP PATC24 ;NOW READ THE BIT
2189 EE75
2189 EE75
2190 EE75 2C 00 A8 CKFREQ BIT DRB ;ARE WE HIGH OR LOW ?
2191 EE78 30 27 BMI CKF4
2191 EE78 30 27 BMI CKF4
2192 EE7A 2C 00 A8 CKF1 BIT DRB ;WAIT TILL HIGH
2193 EE7D 10 FB BPL CKF1
2193 EE7D 10 FB BPL CKF1
2194 EE7F 65 00 ADC $00 ;EQUALIZER
2195 EE81 AD 09 A8 CKF2 LDA T2H ;SAVE CNTR
2195 EE81 AD 09 A8 CKF2 LDA T2H ;SAVE CNTR
2196 EE84 48 PHA
2197 EE85 AD 08 A8 LDA T2L
2197 EE85 AD 08 A8 LDA T2L
2198 EE88 48 PHA
2199 EE89 A9 FF LDA #$FF
2199 EE89 A9 FF LDA #$FF
2200 EE8B 8D 09 A8 STA T2H ;START CNTR
2201 EE8E AD 08 A4 LDA TSPEED
2201 EE8E AD 08 A4 LDA TSPEED
2202 EE91 30 06 BMI CKF3 ;SUPER SPEED ?
2203 EE93 68 PLA
2203 EE93 68 PLA
2204 EE94 CD 08 A4 CMP TSPEED ;HIGH OR LOW FREC
2205 EE97 68 PLA ;C=1 IF HIGH ,C=0 IF LOW
2205 EE97 68 PLA ;C=1 IF HIGH ,C=0 IF LOW
2206 EE98 60 RTS
2207 EE99 68 CKF3 PLA
2207 EE99 68 CKF3 PLA
2208 EE9A CD 08 A4 CMP TSPEED ;CENTER FREQ
2209 EE9D 68 CKF3A PLA
2209 EE9D 68 CKF3A PLA
2210 EE9E E9 FE SBC #$FE
2211 EEA0 60 RTS
2211 EEA0 60 RTS
2212 EEA1 2C 00 A8 CKF4 BIT DRB ;WAIT TILL LOW