Apple II User Manual

Theory of Operation:

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SWEET 16 execution mode begins with a subroutine call to SW16. All

6502 registers are saved at this time, to be restored when a SWEET

16 RTN instruction returns control to the 6502. If you can tolerate

indefinate 6502 register contents upon exit, approximately 30 usec

may be saved by entering at SW16 + 3. Because this might cause an

inadvertant switch from Hex to Decimal mode, it is advisable to enter

at SW16 the first time through.

After saving the 6502 registers, SWEET 16 initializes its PC (R15)

with the subroutine return address off the 6502 stack. SWEET 16's

PC points to the location preceding the next instruction to be

executed. Following the subroutine call are 1-,2-, and 3-byte

SWEET 16 instructions, stored in ascending memory like 6502

instructions. the main loop at SW16B repeatedly calls the 'execute

instruction' routine to execute it.

Subroutine SW16C increments the PC (R15) and fetches the next opcode,

which is either a register op of the form OP REG with OP between 1

and 15 or a non-register op of the form 0 OP with OP between 0 and 13.

Assuming a register op, the register specification is doubled to

account for the 3 byte SWEET 16 registers and placed in the X-reg

for indexing. Then the instruction type is determined. Register ops

place the doubled register specification in the high order byte of

R14 indicating the 'prior result register' to subsequent branch

instructions. Non-register ops treat the register specifcation

(right-hand half-byte) as their opcode, increment the SWEET 16 PC

to point at the displacement byte of branch instructions, load the

A-reg with the 'prior result register' index for branch condition

testing, and clear the Y-reg.

When is an RTS really a JSR?

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Each instruction type has a corresponding subroutine. The subroutine

entry points are stored in a table which is directly indexed into by

the opcode. By assigning all the entries to a common page, only a

single byte to address need be stored per routine. The 6502 indirect

jump might have been used as follows to transfer control to the

appropriate subroutine.

     LDA     #ADRH       ;High-order byte.

     STA     IND+1

     LDA     OPTBL,X     ;Low-order byte.

     STA     IND

     JMP     (IND)