Nortel Networks 311 User Manual
910
NTAK20 Clock Controller daughterboard
State
Definition
On (Green)
NTAK20 is equipped, enabled, and is either locked to a reference or is in free run
mode.
mode.
Flashing
(Green)
(Green)
NTAK20 is equipped and is attempting to lock (tracking mode) to a reference. If the
LED flashes continuously over an extended period of time, check the CC STAT in
LD60. If the CC is tracking this may be an acceptable state. Check for slips and
related clock controller error conditions. If none exist, then this state is acceptable,
and the flashing is identifying jitter on the reference.
LED flashes continuously over an extended period of time, check the CC STAT in
LD60. If the CC is tracking this may be an acceptable state. Check for slips and
related clock controller error conditions. If none exist, then this state is acceptable,
and the flashing is identifying jitter on the reference.
Off
NTAK20 is not equipped.
Each motherboard has five DTI/PRI LEDs and one clock controller LED.
The clock controller LED is dual-color (red and green). The clock controller
LED states are described in
The clock controller LED is dual-color (red and green). The clock controller
LED states are described in
Table 372
Faceplate LEDs
Faceplate LEDs
State
Definition
On (Red)
NTAK20 is equipped and disabled.
On (Green)
NTAK20 is equipped, enabled, and is either locked to a
reference or is in free run mode.
reference or is in free run mode.
Flashing
(Green)
(Green)
NTAK20 is equipped and is attempting to lock (tracking mode) to
a reference. If the LED flashes continuously over an extended
period of time, check the CC STAT in LD 60. If the CC is tracking
this may be an acceptable state. Check for slips and related
clock controller error conditions. If none exist, then this state is
acceptable, and the flashing is identifying jitter on the reference.
a reference. If the LED flashes continuously over an extended
period of time, check the CC STAT in LD 60. If the CC is tracking
this may be an acceptable state. Check for slips and related
clock controller error conditions. If none exist, then this state is
acceptable, and the flashing is identifying jitter on the reference.
Off
NTAK20 is not equipped.
Functional description
The main functional blocks of the NTAK20 architecture include:
•
phase difference detector circuit
•
digital Phase Locked Loop (PLL)
•
clock detection circuit
•
digital-to-analog converter
•
CPU MUX bus interface
•
signal conditioning drivers and buffers
•
sanity timer
•
microprocessor
•
CPU interface
Nortel Communication Server 1000
Circuit Card Reference
NN43001-311
01.04
Standard
Release 5.0
23 May 2008
Copyright © 2003-2008, Nortel Networks
.