Motorola MC68HC05RC8 User Manual
Low-Power Modes
Low-Power Reset
MC68HC05RC16 — Rev. 3.0
General Release Specification
MOTOROLA
Low-Power Modes
55
consumption. Wait current specifications assume CPU operation only
and do not include current consumption by any other subsystems.
and do not include current consumption by any other subsystems.
During wait mode, the I bit in the CCR is cleared to enable interrupts. All
other registers, memory, and input/output lines remain in their previous
states. The timer may be enabled to allow a periodic exit from wait mode.
other registers, memory, and input/output lines remain in their previous
states. The timer may be enabled to allow a periodic exit from wait mode.
6.6 Low-Power Reset
Low-power reset mode is entered when a logic 0 is detected on the
LPRST pin. When in this mode (as long as LPRST is held low), the MCU
is held in reset and all internal clocks are halted. Applying a logic 1 to
LPRST will cause the part to exit low-power reset mode and begin
counting out the 4064-cycle oscillator stabilization period. Once this time
has elapsed, the MCU will begin operation from the reset vectors
($3FFE–$3FFF).
LPRST pin. When in this mode (as long as LPRST is held low), the MCU
is held in reset and all internal clocks are halted. Applying a logic 1 to
LPRST will cause the part to exit low-power reset mode and begin
counting out the 4064-cycle oscillator stabilization period. Once this time
has elapsed, the MCU will begin operation from the reset vectors
($3FFE–$3FFF).