Motorola MVME187 User Manual
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Debugger General Information
4
Global Control and Status Register (GCSR) Method
A remote processor can initiate program execution in the local
MVME187 dual-port RAM by issuing a remote GO command
using the VMEchip2 Global Control and Status Registers (GCSR).
MVME187 dual-port RAM by issuing a remote GO command
using the VMEchip2 Global Control and Status Registers (GCSR).
1. The remote processor places the MVME187 execution
address in general purpose registers 0 and 1 (GPCSR0 and
GPCSR1).
GPCSR1).
2. The remote processor then sets bit 8 (SIG0) of the VMEchip2
LM/SIG register.
3. This causes the MVME187 to install breakpoints and begin
execution. The result is identical to the MPCR method (with
status code B) described in the previous section.
status code B) described in the previous section.
The GCSR registers are accessed in the VMEbus short I/O space.
Each general purpose register is two bytes wide, occurring at an
even address.
Each general purpose register is two bytes wide, occurring at an
even address.
The general purpose register number 0 is at an offset of $8 (local
bus) or $4 (VMEbus) from the start of the GCSR registers. The local
bus base address for the GCSR is $FFF40100. The VMEbus base
address for the GCSR depends on the group select value and the
board select value programmed in the Local Control and Status
Registers (LCSR) of the MVME187. The execution address is
formed by reading the GCSR general purpose registers in the
following manner:
bus) or $4 (VMEbus) from the start of the GCSR registers. The local
bus base address for the GCSR is $FFF40100. The VMEbus base
address for the GCSR depends on the group select value and the
board select value programmed in the Local Control and Status
Registers (LCSR) of the MVME187. The execution address is
formed by reading the GCSR general purpose registers in the
following manner:
The address appears as:
GPCSR0
used as the upper 16 bits of the address
GPCSR1
used as the lower 16 bits of the address
GPCSR0
GPCSR1