Motorola MVME187 User Manual
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Board Level Hardware Description
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Onboard Memory Mezzanine Module
The MVME187 onboard DRAM mezzanine boards are available in
different sizes and with programmable parity protection or Error
Checking and Correction (ECC) protection.
different sizes and with programmable parity protection or Error
Checking and Correction (ECC) protection.
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The main board and a single mezzanine board together take
one slot.
one slot.
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Motorola software supports mixed parity and ECC memory
boards on the same main board.
boards on the same main board.
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Mezzanine board sizes are 4, 8, 16, or 32 MB (parity), or 4, 8,
16, 32, 64, or 128 MB (ECC);
16, 32, 64, or 128 MB (ECC);
Ð Two mezzanine boards may be stacked to provide 256MB
of onboard RAM (ECC) or 64 MB (parity). The stacked
configuration requires two VMEbus slots.
configuration requires two VMEbus slots.
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The DRAM is four-way interleaved to efficiently support
cache burst cycles.
cache burst cycles.
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The parity mezzanines are only supported on 25 MHz main
boards.
boards.
SCSI Mass Storage Interface
The MVME187 provides for mass storage subsystems through the
industry-standard SCSI bus. These subsystems may include
industry-standard SCSI bus. These subsystems may include
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Hard and floppy disk drives
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Streaming tape drives
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Other mass storage devices.
A functional description of the SCSI Interface starts on page