Motorola MVME187 User Manual

Functional Description

2-13

Four 44-pin PLCC/CLCC EPROM sockets for 27C102JK or 
27C202JK type EPROMs. They are:

❏

Organized in two 32-bit wide banks supporting 8-, 16-, and 
32-bit read accesses

❏

Controlled by the VMEchip2

❏

Mapped to local bus address 0 following a local bus reset

РThis allows the MC88100 to start executing code at address 

0 following a reset. 

❏

Map decoder

❏

Access time

❏

When accessible at address 0

The MVME187 includes 128KB of 32-bit wide 100 ns static RAM 
(SRAM), which: 

❏

Supports 8-, 16-, and 32-bit wide accesses. 

❏

Allows debugger operation and execution of limited 
diagnostics without the DRAM mezzanine.

❏

Is controlled by the VMEchip2; the access time is 
programmable.