Motorola MVME1X7P User Manual
2-74
Computer Group Literature Center Web Site
VMEchip2
2
Programming the Local Bus Interrupter
The local bus interrupter is used by devices that need to interrupt the local
bus. There are 31 devices that can interrupt the local bus through the
VMEchip2. In the general case, each interrupter has a level select register,
an enable bit, a status bit, a clear bit, and a set bit for the software
interrupts. Each interrupter also provides a unique interrupt vector to the
processor. The upper four bits of the vector are programmable in the vector
base registers. The lower four bits are unique for each interrupter. There
are two base registers, one for the first 16 interrupters, and one for the next
8 interrupters. The VMEbus interrupters provide their own vectors. A
summary of the interrupts appears in
bus. There are 31 devices that can interrupt the local bus through the
VMEchip2. In the general case, each interrupter has a level select register,
an enable bit, a status bit, a clear bit, and a set bit for the software
interrupts. Each interrupter also provides a unique interrupt vector to the
processor. The upper four bits of the vector are programmable in the vector
base registers. The lower four bits are unique for each interrupter. There
are two base registers, one for the first 16 interrupters, and one for the next
8 interrupters. The VMEbus interrupters provide their own vectors. A
summary of the interrupts appears in
.
The status bit of an interrupter is affected by the enable bit. If the enable
bit is low, the status bit is also low. Interrupts may be polled by setting the
enable bit and programming the level to 0. This enables the status bit and
prevents the local bus from being interrupted. The enable bit does not clear
edge-sensitive interrupts. If necessary, edge-sensitive interrupts should be
cleared, in order to remove any old interrupts, and then re-enabled. The
master interrupt enable (MIEN) bit must be set before the VMEchip2 can
generate any interrupts. The MIEN bit is in I/O Control Register 1.
bit is low, the status bit is also low. Interrupts may be polled by setting the
enable bit and programming the level to 0. This enables the status bit and
prevents the local bus from being interrupted. The enable bit does not clear
edge-sensitive interrupts. If necessary, edge-sensitive interrupts should be
cleared, in order to remove any old interrupts, and then re-enabled. The
master interrupt enable (MIEN) bit must be set before the VMEchip2 can
generate any interrupts. The MIEN bit is in I/O Control Register 1.