Motorola MVME1X7P User Manual

Programming Model

http://www.motorola.com/computer/literature

3-25

General Purpose Input/Output Pin Control Register

GPO

When GPO is set, and GPOE is set, the GPIO pin is at a
logic high level. When GPO is cleared, and GPOE is set,
the GPIO pin is at a logic low level.

GPOE

This bit controls whether or not the PCCchip2 drives the
GPIO pin. When GPOE is set, the PCCchip2 drives the
GPIO pin. When GPOE is cleared, the PCCchip2 does not
drive the GPIO pin.

GPI

This bit reflects the state of the GPIO pin. It is set when
GPIO is high and cleared when GPIO is low. On the
Single-Board Computers, the PCCGPIO1 pin is
connected to the remote reset connector pin 19.

Tick Timer 2 Interrupt Control Register

IL2-IL0

Interrupt Request Level. These three bits select the
interrupt level for Tick Timer 2. Level 0 does not generate
an interrupt.

ICLR

Writing a logic 1 into this bit clears the INT status bit.
This bit is always read as zero.

IEN

Interrupt Enable. When this bit is high, the interrupt is
enabled. The interrupt is disabled when this bit is low.

ADR/SIZ

$FFF42019 (8 bits)

BIT

NAME

GPI

GPOE

GPO

OPER

R/W

RESET

0 PL