Motorola MVME1X7P User Manual

Programming Model

http://www.motorola.com/computer/literature

4-13

The Chip ID register is hard-wired to a hexadecimal value of $81. The 
Petra MCECC sector can be given a software reset by writing a value of 
$0F to this register. This write is terminated properly with TA

∗

 and sets 

most internal registers to their default (power-up) state. Although writes of 
any value other than $0F to this register are ignored, the MCECC sector 
always terminates the cycles properly with TA

∗

.

The Chip Revision register is hard-wired to reflect the revision level of the 
Petra/MCECC ASIC. The current value of the register is $01. Although 
writes to this register are ignored, the MCECC sector pair always 
terminates the cycles properly with TA

∗

. 

31

30

29

28

27

26

25

24

CID7

CID6

CID5

CID4

CID3

CID2

CID1

CID0

R

R

R

R

R

R

R

R

X

X

X

X

X

X

X

X

31

30

29

28

27

26

25

24

REV7

REV6

REV5

REV4

REV3

REV2

REV1

REV0

R

R

R

R

R

R

R

R

X

X

X

X

X

X

X

X