Motorola MVME1X7P User Manual
1-8
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Programming Issues
1
As a general rule, any master can access any slave; not all combinations
pass the common sense test, however. Refer to the device-specific sections
of this manual and to the user’s guide for each device to determine its port
size, data bus connection, and any restrictions that apply when accessing
the device.
pass the common sense test, however. Refer to the device-specific sections
of this manual and to the user’s guide for each device to determine its port
size, data bus connection, and any restrictions that apply when accessing
the device.
EEPROMs on the MVME1X7P
Both boards include 44-pin PLCC/CLCC sockets for EEPROMs,
organized as follows:
organized as follows:
The MVME167P boards use 27C102JK or 27C202JK type EEPROMs.
The MVME177 boards use SGS-Thompson M27C4002 (256K x 16) or
AMD 27C4096 type EEPROMs.
The MVME177 boards use SGS-Thompson M27C4002 (256K x 16) or
AMD 27C4096 type EEPROMs.
The EEPROMs are organized as 32-bit wide banks that support 8-, 16-,
and 32-bit read accesses. (The MVME177 has Flash memory in addition
to EEPROM.)
and 32-bit read accesses. (The MVME177 has Flash memory in addition
to EEPROM.)
MVME167
The EEPROMs are mapped to Local Bus address 0 following a Local Bus
reset. This allows the MC68040 to access the stack pointer and execution
address following a reset. The EEPROMs are controlled by the VMEchip2
ASIC. The map decoder, the access time, and the time they appear at
address 0 are programmable parameters. Refer to
reset. This allows the MC68040 to access the stack pointer and execution
address following a reset. The EEPROMs are controlled by the VMEchip2
ASIC. The map decoder, the access time, and the time they appear at
address 0 are programmable parameters. Refer to
for
more detail.
Model
Sockets
Banks
MVME167
4
2
MVME177
2
1