Samsung C8274X User Manual

8-5 

Stop mode is invoked by the instruction STOP (opcode 7FH). In Stop mode, the operation of the CPU and all 
peripherals is halted. That is, the on-chip main oscillator stops and the supply current is reduced to less than   
3 

µA. All system functions stop when the clock “freezes”, but data stored in the internal register file is retained. 

Stop mode can be released in one of two ways: by a reset or by interrupts, for more details see Figure 7-7. 

Do not use stop mode if you are using an external clock source because X

IN 

or XT

IN

 input must be 

restricted internally to V

SS

 to reduce current leakage. 

Stop mode is released when the nRESET signal is released and returns to high level: all system and peripheral 
control registers are reset to their default hardware values and the contents of all data registers are retained. A 
reset operation automatically selects a slow clock fxx/16 because CLKCON.3 and CLKCON.4 are cleared to   
‘00B’. After the programmed oscillation stabilization interval has elapsed, the CPU starts the system initialization 
routine by fetching the program instruction stored in ROM location 0100H (and 0101H) 

External interrupts with an RC-delay noise filter circuit can be used to release Stop mode. Which interrupt you can 
use to release Stop mode in a given situation depends on the microcontroller’s current internal operating mode. 
The external interrupts in the S3C8275X/C8278X/C8274X interrupt structure that can be used to release Stop 
mode are: 

•  External interrupts P0.0–P0.2 (INT0−INT2) and P1.3−P1.7 (INT3−INT7) 

Please note the following conditions for Stop mode release: 

•  If you release Stop mode using an external interrupt, the current values in system and peripheral control 

registers are unchanged except STPCON register. 

•  If you use an internal or external interrupt for Stop mode release, you can also program the duration of the 

oscillation stabilization interval. To do this, you must make the appropriate control and clock settings before 
entering Stop mode. 

•  When the Stop mode is released by external interrupt, the CLKCON.4 and CLKCON.3 bit-pair setting remains 

unchanged and the currently selected clock value is used. 

•  The external interrupt is serviced when the Stop mode release occurs. Following the IRET from the service 

routine, the instruction immediately following the one that initiated Stop mode is executed. 

Handling STPCON register then writing Stop instruction (keep the order). 

 LD 

 

STPCON, 

#10100101B 

STOP 
NOP 
NOP 
NOP