Samsung C8278X User Manual

The watch timer control register, WTCON is used to select the input clock source, the watch timer interrupt time 
and Buzzer signal, to enable or disable the watch timer function. It is located in set 1, bank 1 at address E1H, and 
is read/write addressable using Register addressing mode. 
A reset clears WTCON to "00H". This disable the watch timer and select fx/128 as the watch timer clock. 
So, if you want to use the watch timer, you must write appropriate value to WTCON.     

Buzzer signal selection bits:
00 = 0.5 kHz
01 = 1 kHz
10 = 2 kHz
11 = 4 kHz

Watch Timer Control Register (WTCON)

E1H, Set 1, Bank 1,  R/W

.7

.6

.5

.4

.3

.2

.1

.0

MSB

LSB

Watch timer INT Enable/Disable bit:
0 = Disable watch timer INT
1 = Enable watch timer INT

Watch timer interrupt pending bit:
0 = Interrupt request is not pending
       (Clear pending bit when write"0")
1 = Interrupt request is pending

Watch timer speed selection bits:
00 = Set watch timer interrupt to 1 s
01 = Set watch timer interrupt to 0.5 s
10 = Set watch timer interrupt to 0.25 s
11 = Set watch timer interrupt to 3.91 ms

Watch timer Enable/Disable bit:
0 = Disable watch timer;
      clear frequency dividing circuits
1 = Enable watch timer

Watch timer clock selection bit:
0 = Select main clock divided by 2

7

 (fx/128)

1 = Select sub clock (fxt)