Fujitsu FR81S User Manual
CHAPTER 25: 16-BIT OUTPUT COMPARE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 16-BIT OUTPUT COMPARE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
15
[bit8] OTD0: Output level bit
OTD0
Function
Read
Write
0
Output value of the compare output 0
The compare output 0 outputs "0".
1
The compare output 0 outputs "1".
⋅
This bit is used to change the compare output 0 level of the output compare.
⋅
The initial value of the compare pin output is "0".
Be sure to stop the compare operation before writing a value to this bit. The value read from this bit is the
output compare value (compare output 0).
Note:
A value can be written to this bit when CST0: bit0=0 in the compare control register (OCS).
[bit7] IOP1: Compare match interrupt flag bit
IOP1
Function
Read
Write
0
No compare match interrupt occurs for the
output compare register (OCCP1).
This bit is cleared.
1
Compare match interrupt occurs for the
output compare register (OCCP1).
This bit remains unaffected.
⋅
This bit is an interrupt flag that indicates whether the value of the output compare register (OCCP7)
matched that of the 16-bit free-run timer.
⋅
This bit is set to "1" when the output compare register value matches the 16-bit free-run timer value.
⋅
An output compare interrupt occurs if this bit is set while the compare match interrupt enable bit
(IOE1:bit5) is enabled ("1").
⋅
When this bit is set to "0": This bit is cleared.
⋅
When this bit is set to "1": This bit remains unaffected.
⋅
For ch.3 and 5, the operation is the same as ch.1.
Notes:
If a read-modify-write instruction is executed, "1" is always read.
If a software clear (write of "0") or a clear due to an interrupt clear signal ("H") and a hardware set occur at
the same time, the hardware set takes precedence.
MB91520 Series
MN705-00010-1v0-E
970