Fujitsu FR81S User Manual
CHAPTER 25: 16-BIT OUTPUT COMPARE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 16-BIT OUTPUT COMPARE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
17
[bit3] BUF1: Compare buffer invalidating bit
BUF1
Function
0
Validates the compare buffer of the output compare register (OCCP1).
1
Invalidates the compare buffer of the output compare register (OCCP1).
⋅
This bit is used to invalidate the buffer function of the output compare register (OCCP1).
⋅
When this bit is set to "0": This buffer function is validated.
⋅
For ch.3 and 5, the operation is the same as ch.1.
[bit2] BUF0: Compare buffer invalidating bit
BUF0
Function
0
Validates the compare buffer of the output compare register (OCCP0).
1
Invalidates the compare buffer of the output compare register (OCCP0).
⋅
This bit is used to invalidate the buffer function of the output compare register (OCCP0).
⋅
When this bit is set to "0": This buffer function is validated.
⋅
For ch.2 and 4, the operation is the same as ch.0.
[bit1] CST1: Compare operation enable bit
CST1
Function
0
Disables the compare operation of the output compare register (OCCP1).
1
Enables the compare operation of the output compare register (OCCP1).
⋅
This bit is used to enable the compare operation between the 16-bit free-run timer and the output compare
register (OCCP1).
⋅
Before enabling the compare operation, be sure to write a value to the output compare register (OCCP1)
and the timer data register of the free-run timer (TCDT[x], where x is a pertinent free-run timer).
⋅
For ch.3 and 5, the operation is the same as ch.1.
[bit0] CST0: Compare operation enable bit
CST0
Function
0
Disables the compare operation of the output compare register (OCCP0).
1
Enables the compare operation of the output compare register (OCCP0).
⋅
This bit is used to enable the compare operation between the 16-bit free-run timer and the output compare
register (OCCP0).
⋅
Before enabling the compare operation, be sure to write a value to the output compare register (OCCP0)
and the timer data register of the free-run timer (TCDT[x], where x is a pertinent free-run timer).
⋅
For ch.2 and 4, the operation is the same as ch.0.
MB91520 Series
MN705-00010-1v0-E
972