Fujitsu FR81S User Manual
CHAPTER 25: 16-BIT OUTPUT COMPARE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 16-BIT OUTPUT COMPARE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
19
[bit0] MOD0: Compare match mode setting bit
MOD0
Function
0
Inverts the previous output value.
1
Sets the output value to "1" or resets it to "0" according to the setting of the CMOD bit in
the
compare control register (OCS01).
⋅
This bit specifies the operation to be performed when a compare match is detected in the output compare
output 0.
⋅
When this bit is set to "0", the output value is inverted upon a compare match.
⋅
When this bit is set to "1", the output value is set to "1" or reset to "0" upon a compare match. The switch
between setting and resetting is performed according to the CMOD bit (common to ch.0 and ch.1) in the
compare control register (OCS01).
⋅
For ch.2 and 4, the operation is the same as ch.0.
Note:
Be sure to stop the compare operation before writing a value to this bit.
MB91520 Series
MN705-00010-1v0-E
974