Fujitsu FR81S User Manual
CHAPTER 27: UP/DOWN COUNTER
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : UP/DOWN COUNTER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
FUJITSU SEMICONDUCTOR CONFIDENTIAL
14
Note:
When this bit is written to "1", the reload compare register (RCR) value is transferred. Therefore, if the
CSTR bit of counter status register (CSR) is "1" (the counter is operating), this bit must not be rewritten
to "1".
CSTR bit of counter status register (CSR) is "1" (the counter is operating), this bit must not be rewritten
to "1".
[bit5] UCRE : Counter clear enable bit
This bit enables or disables to use the compare function.
The compare function clears the counter value to "0000
H
" and continues counting if the counter value
matches the value being set in the reload compare register (RCR).
Write value
Description
0
Disables to use the compare function.
1
Enables to use the compare function.
Note:
This bit can only clear the counter value using the compare function.
This bit cannot control the following clearing operations.
· Clear the counter when this device is reset.
· Clear the counter when an effective edge signal is input from the ZIN pin (if CGSC bit is 0).
· Clear the counter by writing the UDCC bit to "0". (Software-triggered clear).
This bit cannot control the following clearing operations.
· Clear the counter when this device is reset.
· Clear the counter when an effective edge signal is input from the ZIN pin (if CGSC bit is 0).
· Clear the counter by writing the UDCC bit to "0". (Software-triggered clear).
[bit4] RLDE : Reload enable bit
This bit enables or disables to use the reload function.
The reload function continues counting by reloading the value, being set in the reload compare register
(RCR), onto the counter when the counter has underflowed during counting down.
(RCR), onto the counter when the counter has underflowed during counting down.
Write value
Description
0
Disables to use the reload function.
1
Enables to use the reload function.
[bit3] UDCC : Counter clear bit
Clears the counter value to "0000
H
".
UDCC
Read
Write
0
"1" is read.
This bit is cleared to "0".
1
Ignored
MB91520 Series
MN705-00010-1v0-E
1021