Fujitsu FR81S User Manual
CHAPTER 27: UP/DOWN COUNTER
6. Operation and Setting Procedure Examples
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : UP/DOWN COUNTER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
FUJITSU SEMICONDUCTOR CONFIDENTIAL
30
6.3. Operation in the Phase Difference Count Mode
(Multiply-by-Two)
This section explains the operation in the phase difference count mode (multiply-by-two).
Overview
This mode involves counting the phase difference of the signal input from two external signal input pins.
This mode is suitable to count the phase difference of phases A and B of encoder outputs.
This mode is suitable to count the phase difference of phases A and B of encoder outputs.
When a rising edge or falling edge is detected from the BIN pin, the input level of the AIN pin is verified to
count up or down the phase difference of the BIN and AIN pins. If phase A advances faster than phase B,
their phase difference is counted up. If the former is delayed more than the latter, their phase difference is
counted down.
count up or down the phase difference of the BIN and AIN pins. If phase A advances faster than phase B,
their phase difference is counted up. If the former is delayed more than the latter, their phase difference is
counted down.
Counting up or counting down is determined depending on the BIN pin detection edge and AIN pin input
level.
level.
Table 6-3 lists the count methods.
Table 6-3 Count Methods
BIN pin
AIN pin
Count Direction
Rising edge
"H" level
Counting up
"L" level
Counting down
Falling edge
"H" level
Counting down
"L" level
Counting up
Moreover, the following three types of functions can be used in the phase difference count mode
(multiply-by-two).
(multiply-by-two).
· Reload function
· Compare function
· Reload compare function
· Compare function
· Reload compare function
MB91520 Series
MN705-00010-1v0-E
1037