Fujitsu FR81S User Manual
CHAPTER 29: RTC/WDT1 CALIBRATION
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : RTC/WDT1 CALIBRATION
FUJITSU SEMICONDUCTOR CONFIDENTIAL
9
4.2. Sub Clock Timer Data Register : CUTD0 (Calibration
Unit Timer Data register 0)
The bit configuration of the sub clock timer data register is shown.
This register configures a period of the time during which the sub clock driven counter operates.
CUTD0 : Address 04BA
H
(Access: Byte, Half-word, Word)
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
TDD[15:8]
Initial value
1
0
0
0
0
0
0
0
Attribute R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
TDD[7:0]
Initial value
0
0
0
0
0
0
0
0
Attribute R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
[bit15 to bit0] TDD[15:0] (Timer Data Data field) : Timer data
These bits configure the comparison time interval in the number of the sub clock pulses.
MB91520 Series
MN705-00010-1v0-E
1078