Fujitsu FR81S User Manual
CHAPTER 30: POWER CONSUMPTION CONTROL
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : POWER CONSUMPTION CONTROL
FUJITSU SEMICONDUCTOR CONFIDENTIAL
8
4.1. Standby Control Register: STBCR (STandby mode
Control Register)
The bit configurations of the standby control register are shown below.
This register configures low-power consumption modes.
STBCR : Address 0482
H
(Access: Byte, Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
STOP
TIMER SLEEP Reserved
Reserved
SLVL[1:0]
Initial value
0
0
0
0
0
0
1
1
Attribute
R,W
R,W
R,W
R0,W0
R0,W0 R0,W0
R/W
R/W
Note:
Writing to this register by DMA is prohibited.
[bit7] STOP (STOP mode): Stop mode enable
[bit6] TIMER (TIMER mode): Watch mode enable
[bit5] SLEEP (SLEEP mode): Sleep mode enable
[bit6] TIMER (TIMER mode): Watch mode enable
[bit5] SLEEP (SLEEP mode): Sleep mode enable
Transitions to each standby mode (stop, watch, and sleep) are specified and enabled by these 3 bits. After
writing the values shown below to these 3 bits and reading STBCR, the CPU goes into each standby mode.
STOP
TIMER
SLEEP
Enabled transition to each standby mode
0
0
0
No transition (initial value)
0
0
1
Transition to sleep mode by reading STBCR
0
1
X
Transition to watch mode by reading STBCR
1
X
X
Transition to stop mode by reading STBCR
The read value of each bit is as follows regardless of the writing value:
STOP
TIMER
SLEEP
Enabled transition to each standby mode
0
0
0
No transition
0
0
1
Transition to sleep mode
0
1
0
Transition to watch mode
1
0
0
Transition to stop mode
These bits are returned to their initial values by wake up factors arising from each low-power consumption
mode.
[bit4] Reserved
The read value is always "0". Be sure to write "0" to this bit.
[bit3, bit2] Reserved
The read value is always "0". Be sure to write "0" to these bits.
MB91520 Series
MN705-00010-1v0-E
1095