Fujitsu FR81S User Manual
CHAPTER 30: POWER CONSUMPTION CONTROL
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : POWER CONSUMPTION CONTROL
FUJITSU SEMICONDUCTOR CONFIDENTIAL
23
5.3.3. Configuration of Sleep Mode
The configuration of sleep mode is described below.
Before activating sleep mode, select whether to supply/stop external bus clock in sleep mode with the
values set to bit7:TSTP in the DIVR1 register.
⋅
When setting bit7:TSTP="0" in the DIVR1 register, the external bus clock does not stop.
⋅
When setting bit7:TSTP="1" in the DIVR1 register, the external bus clock stops.
When activating sleep mode, select the level of sleep mode with the values set to bit1:SLVL1 in the STBCR
register.
⋅
When setting bit1:SLVL1="0" in the STBCR register, CPU goes into CPU sleep mode.
⋅
When setting bit1:SLVL1="1" in the STBCR register, CPU goes into bus sleep mode.
MB91520 Series
MN705-00010-1v0-E
1110