Fujitsu FR81S User Manual
CHAPTER 36: EXTERNAL BUS INTERFACE
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : EXTERNAL BUS INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
28
Operating example description
cycle1 :
The cycle where access begins. "L" is output to ASX to indicate the start of access. Address
information is output to D16 to D31. ASX functions as the strobe signal for this address information. This
address information is output for the configured count cycles.
cycle2 :
After the configured count has finished from the access starting, "L" is output to CSnX (n= 0 to 3)
continually until the access is complete. Devices on the external bus need to perform processing for the
access only within the period where CSnX="L".
cycle3 :
After the configured count has finished after "L" starts being output to CSnX, "L" is output to
WRnX (n=0, 1). External bus devices are required to fetch the value of D16 to D31 within the write strobe
period indicated by WRnX="L".
cycle4 :
After the configured count has finished from when WRnX="L" starts being output, the output of
WRnX returns to "H" and the write strobe period ends. In this example, the write strobe period is extended
by 1 cycle. At the end of this cycle, the output of WRnX returns to "H" and the write strobe period ends.
cycle5 :
The output of CSnX returns to "H" after the configured count finishes from when WRnX returns to
"H", and the write access finishes. In this example, CSnX returns to "H" when this cycle ends and the write
access finishes.
Signal description
External bus output signals are synchronized to the rising edge of SYSCLK.
ASX
Indicates the start of access. This also functions as the address strobe.
An "L" pulse is output for a period of 1 or 2 cycles from when the access starts.
CSnX (n=0 to 3)
Indicates that the access destination address is within the corresponding CS area. External bus devices are
required to process requests from the bus only when this signal is "L". After the configured count has
finished from when the access started, "L" begins to be output, and this continues until the access finishes.
WRnX (n=0, 1)
Indicates the period of the write strobe. After the configured count ends from when CSnX is driven, this
outputs "L" for write access. This returns to output "H" after the write auto wait count has ended. External
bus devices are required to fetch the data of D16 to D31 within the period where WRnX="L".
D16 to D31
Outputs the address information of the access destination from when the access starts. The write data begins
to be output after the configured count ends, and continues until the access finishes. External bus devices
are required to fetch the value of D16 to D31 within the write strobe period.
MB91520 Series
MN705-00010-1v0-E
1227