Fujitsu FR81S User Manual
CHAPTER 36: EXTERNAL BUS INTERFACE
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : EXTERNAL BUS INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
29
5.3. Address Alignment
This section shows the address alignment.
The external bus interface does not detect misalignment errors in the access destination address. As a result,
word access and half-word access are performed as follows.
Word access
Regardless of whether the lowermost 2 bits of the address specified by the program are "00", "01", "10", or
"11", the lowermost 2 bits of the output address are "00".
Half-word access
If the lowermost 2 bits of the address specified by the program are "00" or "01, the lowermost 2 bits of the
output address are "00", and if the lowermost 2 bits are "10" or "11", then the lowermost 2 bits of the output
address are "10".
MB91520 Series
MN705-00010-1v0-E
1228