Fujitsu FR81S User Manual
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
40
4.2.5.
Serial Aid Control Status Register: SACSR
Serial Aid Control Status Register (SACSR) has setups for serial test operation control, serial timer startup
selection, timer interrupt enable/disable, synchronous transmission enable/disable, operating clock division
rate of serial timer, and serial timer enable/disable.
SACSRn(n=0 to 11): Address Base addr + 08
H
(Access: Byte, Half-word, Word)
15
14
13
12
11
10
9
8
bit
STST
-
-
-
-
TRG1
TRG0
TINT
0
0
0
0
0
0
0
0
Initial value
R/W
RX,WX RX,WX RX,WX RX,WX
R/W
R/W
R/W
Attribute
7
6
5
4
3
2
1
0
bit
TINTE TSYNE TRGE TDIV3 TDIV2 TDIV1 TDIV0 TMRE
0
0
0
0
0
0
0
0
Initial value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Attribute
[bit15] STST: Serial test bit
This bit selects to enable or disable serial test mode.
When serial test mode is enabled, SOUT and SIN will be connected in the multi-function serial interface so
that the data output from SOUT can be received from SIN without any modification.
When serial test mode is enabled, SOUT pin will be fixed to "H" and data input to SIN pin will be ignored.
STST
Serial test bit
0
Disables serial test mode
1
Enables serial test mode
[bit14 to bit11] Undefined
Read value is undefined. No effect for writing operations.
[bit10, bit9] TRG1-0: Trigger Selection Bits
These bits select how to detect external trigger edge used for starting serial timer.
TRG1
TRG0
How to detect external trigger edge
0
0
Trailing edge detection
0
1
Rising edge detection
1
0
Both edges detection
1
1
Prohibited to set
Note:
Invalid when external trigger enable bit (TRGE) is "0".
[bit8] TINT: Timer Interrupt Flag
When Serial Timer Register (STMR) matches Serial Timer Comparison Register (STMCR), the Serial
Timer Register (STMR) becomes "0" and this bit will be set to "1".
When this bit is "1" and timer interrupt enable bit (TINTE) is "1", status interrupt request will be output.
When this bit is set to "0", it will be reset to "0".
Writing "1" to this bit is invalid.
TINT
Description
0
No timer interrupt request
1
Timer interrupt request
MB91520 Series
MN705-00010-1v0-E
1353