Fujitsu FR81S User Manual
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
59
[bit12] CSEIE: Chip select error interrupt enable bit
This bit is used to enable/disable chip select error interrupt request output.
When the CSEIE bit and the chip select error flag bit (CSE) are set to "1", a transmission interrupt request
will be output.
CSEIE
Chip select error interrupt enable bit
0
Chip select error interrupt disabled
1
Chip select error interrupt enabled
[bit11] CSE: Chip select error flag bit
In the slave mode (SCR:MS="1"), if a serial chip select pin becomes inactive during the transmission
operation (SSR:TBI=0), this bit will be set to "1".
When this bit is set to "1" and the chip select error interrupt enable bit (CSEIE) is set to "1", a transmission
interrupt request will be output.
Writing "0" to this bit will reset it to "0".
Writing "1" to this bit has no effect.
CSE
Chip select error flag bit
0
No chip select errors
1
Chip select errors
Notes:
⋅
When software reset is triggered (SCR:UPCL="1"), this bit will be reset to "0".
⋅
For read-modify-write instructions, "1" will be read.
⋅
When serial chip select is unused (SCSCR:CSEN0="0"), this bit will not be set to "1".
⋅
In the master mode (SCR:MS="0"), this bit will not be set to "1".
[bit10, bit9] TRG1-0: Trigger select bits
These bits are used to select how to detect an edge of an external trigger for activating the serial timer.
TRG1
TRG0
How to detect an edge of an external trigger
0
0
Falling edge detected
0
1
Rising edge detected
1
0
Both edges detected
1
1
Setting prohibited
Note:
These bits have no effect when the external trigger enable bit (TRGE) is set to "0".
[bit8] TINT: Timer interrupt flag
When the serial timer register (STMR) matches the serial timer compare register (STMCR), the serial timer
register (STMR) will be set to "0", and this bit will be set to "1".
When this bit is set to "1" and the timer interrupt enable bit (TINTE) is set to "1", a status interrupt request
will be output.
Writing "0" to this bit will reset it to "0".
Writing "1" to this bit has no effect.
TINT
Description
0
No timer interrupt request
1
Timer interrupt request
MB91520 Series
MN705-00010-1v0-E
1372