Fujitsu FR81S User Manual
CHAPTER 3: CPU
4. Pipeline Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : CPU
FUJITSU SEMICONDUCTOR CONFIDENTIAL
12
4. Pipeline Operation
This section explains the pipeline operation of the CPU.
In FR81, the common pipeline processing is carried out by the decode stage, and there are two types of
pipelines such as an integer pipeline and a floating point pipeline from the execution stage. Although the
completion between each pipeline processing differs from the sequence of instruction issuances, the
processing results based on the program sequence are guaranteed.
For details, see "FR Family FR81 32-bit Microcontroller Programming Manual".
MB91520 Series
MN705-00010-1v0-E
109