Fujitsu FR81S User Manual
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
5. Operation of UART
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
178
FIFO Used
(Master CPU)
Start
Operation mode setting
(setting to mode 1)
(setting to mode 1)
・Enables transmission/
reception FIFO
・FBYTE setting
reception FIFO
・FBYTE setting
No
Sets
“1” to AD bit
Sets
“0” to AD bit
Reading and processing
for FBYTE setting value
for FBYTE setting value
Sets
“0” to D8 bit
Yes
(Slave CPU)
Start
RDRF=1
Sets FBYTE = N
AD=1 &
Slave address match
No
No
Yes
Yes
Sets slave address to
transmission FIFO and
write
transmission FIFO and
write
“0” to FDRQ bit
Sets N byte to transmission
FIFO and write
FIFO and write
“0” to FDRQ bit
RDRF=1
Enables transmission/
reception FIFO
reception FIFO
Sets FBYTE=1
No
Yes
Reception FIFO full
Reading and processing
for FBYTE setting value
for FBYTE setting value
Sets N byte to transmission
FIFO and write
FIFO and write
“0” to FDRQ bit
Transmission of
slave address
slave address
Data transmission
Data transmission
Operation mode setting
(setting to mode 1)
(setting to mode 1)
MB91520 Series
MN705-00010-1v0-E
1491