Fujitsu FR81S User Manual

Page of 2342
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE 
 
 
6. Operation of CSIO 
 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE 
FUJITSU SEMICONDUCTOR CONFIDENTIAL 
219 
 SPI Transfer (II) Timing Chart (When Serial Chip Select Pin Used) 
Figure 6-15 SPI Transfer (II) Timing Chart (When Serial Chip Select Pin Used) 
D1
D0
●Transmission 
operation
SCK
SOUT
TDRE
TDR_RW
TXE
SCS*B
●Reception 
operation
SIN
Sampling
RDRF
RDR RD
RXE
D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7
TBI
D1
D0
D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7
1
st
 byte
2
nd
 byte
*C
*A: 
More than 4 machine cycles are necessary after writing to TDR for slave transmission
                 (MS=1, SCKE=0, SOE=1)
*B:
SCS output when MS=0, SCS input when MS=1
*C:      
D7 when SCR:MS=0
 
D0 of the third byte when it is SCR:MS=1 and TDRE is ”L”
D7 when it is SCR:MS=1 and TDRE is ”H”
*D:
Internal counter to be count transmission bytes
*A
2
TBYTE
2
1
0
Transmissions 
counter*D
Load
 
 
MB91520 Series
MN705-00010-1v0-E
1532