Fujitsu FR81S User Manual
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
7. Operation of LIN Interface (v2.1)
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
256
Interrupt
type
Interrupt
request flag
bit
Flag
register
Interrupt factor
Interrupt
factor
enable bit
How to clear the interrupt
request
Status(Ass
ist Mode)
LBD
SSR
Lin break field
detection
ESCR:LBIE
Writing "0" to the SSR:LBD
SFD
SACSR
Sync Field is detected
SACSR:
SFDE
Writing "0" to Sync Field
detection flag (SACSR:SFD)
TINIT
SACSR
Serial Timer Register
(STMR) matched Serial
Timer Comparison
Register (STMCR)
SACSR:
TINTE
Writing "0" to timer interrupt flag
bit (SACSR:TINT)
LAHC
LAMSR
Automatic header
completion
LAMIER:LAH
CIE
Writing "0" to the
LAMSR:LAHC
LCSC
LAMSR
Checksum arithmetic
operation completion
LAMIER:LCS
CIE
Writing "0" to the LAMSR:CRC
Input
capture
ICP
ICS
1st falling edge of Lin
Synch Field
ICS:ICE0
Disabling of ICP
ICP
ICS
5th falling edge of Lin
Synch Field
*1: Set the TIE bit to "1" after the TDRE bit becomes "0".
MB91520 Series
MN705-00010-1v0-E
1569