Fujitsu FR81S User Manual

CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE

7. Operation of LIN Interface (v2.1)

FUJITSU SEMICONDUCTOR LIMITED

CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL

309

Figure 7-66 LIN bus timing (DATA Field

transmission: FIFO use, AUTE=1 and ID register use).

FTICR(setting)

FDRQ

FTIE

LIN bus

LIN Break

delimiter

SCR : RXE

SSR : RDRF

Sync Field

SCR : RIE

ID Field

Data 1

Data 2

Data 3

Data (N-2)

LAMCR : LIDEN

FIFO write

ID Field value is
ID register use

ID Field value is
Setting to ID register

LIN Break start

LAMCR : LAMEN

H : assist mode processing enable

LIN auto header
transmission
complete flag

H : ID register use

Response

space

checksum

Data N

Data (N-1)

L : reception interrupt disable

Checksum operation complete

ID Field value

LAMRID

LAMSR : LAHC

LAMSR : LCSC

SACSR : BST

BGR

L : no auto baud rate adjustment 　H : auto baud rate adjustment

Baud rate value after it updates

SCR : TIE

SCR : TXE

SSR : TDRE

L : transmission disable

L : transmission interrupt disable

　：　Don’t care

Transmission byte : 0 byte

FTICR(display)

N-1

N-2

N-3

H : transmission FIFO interrupt enable

L : transmission FIFO interrupt disable

H : transmission FIFO data demand

L : transmission FIFO data no demand

RDR

LAMCR : LDL3-0

Data length setting

H : transmission interrupt enable

H : transmission enable

Transmission data write :
TDR

L : reception disable

Figure 7-67 LIN bus timing (DATA Field transmission: FIFO use, AUTE=1 and ID register
unused).