Fujitsu FR81S User Manual
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
8. Operation of I2C
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
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8.4.4. Slave Mode Transmission
If the slave address matches and if the data direction bit is "1", it indicates the data transmission in the slave
mode. If the FIFO operation is disabled, the interrupt flag (IBCR:INT) is set to "1" and a wait is generated
based on the IBCR:WSEL setting after sending one byte of data or after acknowledgement.
(See Table 8-2).
An acknowledgement output from the master device can be checked with the IBCR:RACK bit. If the master
returns a NACK response, it indicates that the master has failed to receive data or the data reception has
completed. If a NACK signal is detected when the IBCR:WSEL bit is "1", an interrupt will occur and wait
will be generated.
MB91520 Series
MN705-00010-1v0-E
1686