Fujitsu FR81S User Manual
CHAPTER 41: CAN
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: CAN
FUJITSU SEMICONDUCTOR CONFIDENTIAL
61
5.1.1. Message Object
Message object is shown.
Message object settings (excluding MsgVal, NewDat, IntPnd and TxRqst bits) of message RAM will not be
initialized by a hardware reset. Therefore, initialize message object by the CPU or disable the MsgVal bit
(MsgVal="0"). Set CAN bit timing register (BTR) and CAN prescaler extension register (BRPER) while the
Init bit of the CAN control register (CTRLR) is set to "1" and the CCE bit is set to "1".
Message object can be set by setting the data to the message interface register (IFx mask register, the IFx
arbitration register, the IFx message control register (IFxMCTR) and IFx data register (IFxDTx)) and then
writing the message number to the IFx command request register (IFxCREQ), as a result of which the data
of the interface register will be transferred to the specified message object.
CAN controller starts operating when Init bit of the CAN control register (CTRLR) is cleared to "0".
Reception message that has passed through the acceptance filter will be stored to message RAM. Messages
with pending transmission request are transferred from message RAM to the shift register of the CAN
controller and then transmitted to the CAN bus.
CPU reads the reception message via the message interface register and updates the transmission message.
An interrupt is sent to the CPU according to the settings of the CAN control register (CTRLR) and IFx
message control register (IFxMCTR) (message object).
MB91520 Series
MN705-00010-1v0-E
1754