Fujitsu FR81S User Manual
CHAPTER 41: CAN
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: CAN
FUJITSU SEMICONDUCTOR CONFIDENTIAL
85
5.7.1. Test Mode Setting
Test mode setting is shown.
The CAN controller enters test mode when the Test bit of the CAN control register (CTRLR) is set to "1".
In test mode, the bits Tx1, Tx0, LBack, Silent, and Basic of the CAN test register (TESTR) are valid.
All test register functions are invalidated when the Test bit of the CAN control register (CTRLR) is reset to
"0".
MB91520 Series
MN705-00010-1v0-E
1778