Fujitsu FR81S User Manual
CHAPTER 44: 12-BIT A/D CONVERTER
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 12-BIT A/D CONVERTER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
29
ADCOMP0 to ADCOMP31: Address 130C
H
to 134A
H
(Access: Half-word,
Word)
ADCOMP32 to ADCOMP47: Address 1478
H
to 1496
H
(Access: Half-word,
Word)
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
CMP15
CMP14
CMP13
CMP12
CMP11
CMP10
CMP09
CMP08
Initial value
0
0
0
0
0
0
0
0
Attribute
R
R
R
R
R
R
R
R
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
CMP07
CMP06
CMP05
CMP04
CMP03
CMP02
CMP01
CMP00
Initial value
0
0
0
0
0
0
0
0
Attribute
R
R
R
R
R
R
R
R
[bit15 to bit0] CMP15 to CMP00 : Compare value bits
CMP15 to CMP00
Function
Compare value buffer
The compare value is updated via the compare buffer register.
The compare register holds the compare value to be compared with the 16-bit free-run timer count value,
so that A/D conversion can be activated when the free-run timer value matches the compare value.
When a value is stored in the compare register, it is immediately compared.
Compare-match operation is not performed if SEL1,SEL0=11b holds true in the A/D activation trigger
control status register (ADTCS).
Note:
When reading the compare register, use a word or half-word access.
Do not use a read-modify-write instruction when accessing the compare register.
MB91520 Series
MN705-00010-1v0-E
1832