Fujitsu FR81S User Manual
CHAPTER 44: 12-BIT A/D CONVERTER
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 12-BIT A/D CONVERTER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
39
ADTECS32 to ADTECS47: Address 1538
H
to 1556
H
(Access: Byte, Half-word,
Word)
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
Reserved
STS2
Initial value
0
0
0
0
0
0
0
0
Attribute R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R/W
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Reserved Reserved Reserved Reserved CHSEL3
CHSEL2
CHSEL1
CHSEL0
Initial value
0
0
0
0
0
0
0
0
Attribute R0,W0
R0,W0
R0,W0
R0,W0
R/W
R/W
R/W
R/W
[bit15 to bit9] Reserved
These bits must always be written to "0".
[bit8] STS2 : A/D activation factor select bit
The activation factor of the A/D conversion is selected by the this bit and the bit12, bit11 (STS1,STS0) of
A/D activation trigger control status register (ADTCS). Please refer to "4.2.4. A/D Activation Trigger
Control Status Register : ADTCS0 to ADTCS47" for details.
Notes:
Since the activation factor select bit changes immediately when the bits are rewritten, change this bit
while the current target and target activation factor are inactive and the A/D conversion is not being
requested (ADTCS:BUSY=1).
Please set these bits including ADTCS.STS1 and ADTCS.STS0 as software activation ("000B"), and set
a corresponding bit of ADTSE (activation channel) to the software activation disable (ADT bit =0) when
A/D conversion is not being requested.
Please confirm the 16-bit free-run timer has stopped whenever the A/D activation factor select bit is set.
[bit7 to bit4] Reserved
These bits must always be written to "0".
[bit3 to bit0] CHSEL3 to CHSEL0 : Analog channel select bit
CHSEL3 CHSEL2 CHSEL1 CHSEL0
Explanation
0
0
0
0
Channel 32
0
0
0
1
Channel 33
0
0
1
0
Channel 34
:
:
1
1
1
0
Channel 46
1
1
1
1
Channel 47
MB91520 Series
MN705-00010-1v0-E
1842