Fujitsu FR81S User Manual
CHAPTER 44: 12-BIT A/D CONVERTER
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 12-BIT A/D CONVERTER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
62
Recommended setting
Peripheral clock
(MHz)
CT1
CT0
Compare time (ns)
40
0
0
700
32
0
0
875
24
0
0
1166.7
16
0
0
1750
Note:
Please set the compare time to 700ns or more. When the compare time is set to 700ns or less, a normal
value of the analog conversion value might not be obtained.
Please rewrite these bits when the A/D operation has stopped before conversion operation.
[bit1,bit0] ST1, ST0 : Sampling time setting bits
ST1
ST0
Function
0
0
12 Peripheral clock
(A/D clock output : Peripheral clock /2)
0
1
18 Peripheral clock
(A/D clock output : Peripheral clock /3)
1
0
24 Peripheral clock
(A/D clock output : Peripheral clock /4)
1
1
48 Peripheral clock
(A/D clock output : Peripheral clock /8)
These bits select the sampling time in the A/D conversion.
The analog input is taken at the time set to these bits after A/D is activated.
Recommended setting (Use conditions: AV
CC
=2.7V to 5.5V)
Peripheral clock
(MHz)
ST1
ST0
Sampling time (ns)
40
0
0
1200
32
0
0
1500
24
0
0
1000
16
0
0
1125
MB91520 Series
MN705-00010-1v0-E
1865