Fujitsu FR81S User Manual
CHAPTER 44: 12-BIT A/D CONVERTER
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 12-BIT A/D CONVERTER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
84
Figure 5-10 When 16-bit free-run timer counting up and down, the compare register data
transfer timing at compare match
CFFF
H
BFFF
H
0000
H
Count value
time
Compare buffer register
(ADCOMPB)
BFFF
H
Compare register
(ADCOMP)
A/D activation request
CFFF
H
”BFFF
H
”
A/D activation
request
”BFFF
H
”
A/D activation
request
”CFFF
H
”
A/D activation
request
”0000
H
”
A/D activation
request
BFFF
H
0000
H
FFFF
H
0000
H
BFFF
H
CFFF
H
BFFF
H
0000
H
FFFF
H
”BFFF
H
”
A/D activation
request
”BFFF
H
”
A/D activation
request
”BFFF
H
”
A/D activation
request
Figure 5-11 When 16-bit free-run timer counting up and down, the compare register data
transfer timing at 0 detection
CFFF
H
BFFF
H
0000
H
Count value
time
Compare buffer
register(ADCOMPB)
BFFF
H
Compare register
(ADCOMP)
A/D activation request
CFFF
H
”BFFF
H
”
A/D activation
request
”CFFF
H
”
A/D activation
request
”0000
H
”
A/D activation
request
BFFF
H
0000
H
FFFF
H
0000
H
BFFF
H
CFFF
H
BFFF
H
0000
H
FFFF
H
”BFFF
H
”
A/D activation
request
0000
H
”BFFF
H
”
A/D activation
request
”BFFF
H
”
A/D activation
request
”0000
H
”
A/D activation
request
MB91520 Series
MN705-00010-1v0-E
1887