Fujitsu FR81S User Manual

CHAPTER 45: FLASH MEMORY

5. Operation

FUJITSU SEMICONDUCTOR LIMITED

CHAPTER : FLASH MEMORY

FUJITSU SEMICONDUCTOR CONFIDENTIAL



Each bit and flash memory status

Table 5-2 shows the correspondence between the state of each bit of the hardware sequence flag and the

flash memory status.

Table 5-2 Correspondence between Flags and Flash Memory Status

*1 : See "● Bit descriptions" for the values that are read out.

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Bit descriptions

[bit15 to bit8] Undefined bits

[bit7] DPOLL : Data polling flag bit

When the hardware sequence flag is read by specifying the write/erase target address, this bit indicates

whether or not the automatic algorithm is running using a data polling function.

The value that is read differs depending on the state.

1. When writing

During execution of

writing

Reads out the opposite value (inverted data) of the value of bit7 of the

last data to be written. The address specified for reading the hardware

sequence flag is not accessed.

After writing finished Reads out the value of bit7 of the address specified for reading the

hardware sequence flag.

2. During sector erase

During sector erase

Reads "0" from the sector being erased.

After sector erase

This bit always reads out as "1".

3. During chip erase

During execution of chip

erase

This bit always reads out as "0".

After chip erase

This bit always reads out as "1".

4. During sector erase suspend

State of suspend

(incomplete end)

"0" is read from the sector erase suspend sector.

Sector erase operation

completion

"1" is read from the sector erase suspend sector..

Status

DPOLL

TOGG1

TLOV

SETI TOGG2

Run

Writing

Inverted

data (*1)

Toggle

Sector/Chip erasing

Toggle

Time limit

exceed

Write command

Inverted

data (*1)

Toggle

Sector erase/Chip erase

command

Toggle

Sector erase

suspend

Erase target sector

Toggle

MB91520 Series

MN705-00010-1v0-E

1955