Fujitsu FR81S User Manual
CHAPTER 47: ON CHIP DEBUGER (OCD)
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: ON CHIP DEBUGGER : OCD
FUJITSU SEMICONDUCTOR CONFIDENTIAL
13
4.2. User IO Register
The bit configuration of the User IO register is shown.
Table 4-2 Register Map (User IO Register)
Address
Register
Register function
+0
+1
+2
+3
0x0BF0
HSCFR
High-speed communication
frequency register
0x0BF8
Reserved
MBR
Massage buffer
0x0BFC
Reserved
UER
User event register
MB91520 Series
MN705-00010-1v0-E
2024