Fujitsu FR81S User Manual
CHAPTER 49: BUS DIAGNOSIS FUNCTION
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : BUS DIAGNOSIS FUNCTION
FUJITSU SEMICONDUCTOR CONFIDENTIAL
12
4.2. Bus Diagnosis Test Register : BUSTSTR0/1
This section explains the bus diagnosis test register.
The bus diagnosis test register (BUSTSTR0, BUSTSTR1) sets the bus diagnosis test function.
BUSTSTR0: Address 3106
H
(Access: Half-word, Word)
15
14
13
12
11
10
9
8
BIT
KEY1
KEY0
-
CEN
RBEN
APBEN
AHBEN
0
0
0
0
0
0
0
0
Initial values
R0/W
R0/W
R0,WX
R0,WX
R/W
R/W
R/W
R/W
Attributes
7
6
5
4
3
2
1
0
BIT
DEN[3]
DEN[2]
DEN[1]
DEN[0]
AEN[3]
AEN[2]
AEN[1]
AEN[0]
0
0
0
0
0
0
0
0
Initial values
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Attributes
[bit15 bit14] KEY1, KEY0: Key bits
Key bits. If "00", "01", "10", and "11" are continuously written in these bits, the data is updated to the data
written in bit11 to bit0. However, during this continuous writing, data in bit11 to bit0 is not updated unless
the same value is written in bit11 to bit0 four times. Moreover, data is not updated if the bus diagnosis
register is read during writing. In this case, writing to this register continuously four times is required again.
Example:
Write 07AA
H
in BUSTSTR.
Next, write 47AA
H
in BUSTSTR.
Next, write 87AA
H
in BUSTSTR.
Next, write C7AA
H
in BUSTSTR. -> With this writing, BUSTSTR is set to 07AA
H
.
[bit13, bit12] Undefined
"0" is always read. Writing does not affect operation.
[bit11] CEN: Control error
Control error setting bit
If this bit is "0", the control parity is properly generated.
If this bit is "1", a control parity error occurs.
Note:
For RBEN=0, APBEN=0, and AHBEN=0, this bit is invalid. Under such condition, it will be the same
behavior as when "0" is set to this bit.
MB91520 Series
MN705-00010-1v0-E
2105