Fujitsu FR81S User Manual
CHAPTER 50: RAM DIAGNOSIS FUNCTION
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : RAM DIAGNOSIS FUNCTION
FUJITSU SEMICONDUCTOR CONFIDENTIAL
22
4.10. TEST Key Code Control Register XBS RAM : TKCCRX
This section explains the bit structure of TEST Key Code Control Register XBS RAM.
The TEST key code control register (TKCCRX) is used to start or forcibly terminate the RAM diagnosis or
initialization for XBS RAM.
•
TKCCRX: Address 3023
H
(Access: Byte, Half-word, Word))
7
6
5
4
3
2
1
0
BIT
KEY1
KEY0
Reserved
CODE1
CODE0
0
0
0
0
0
0
0
0
Initial values
R0, W
R0, W
R0, W0
R0, W0
R0, W0
R0, W0
R/W
R/W
Attributes
[bit7, bit6] KEY1, KEY0: Key code control bits
Key code control bits. Operation is performed when operation indication content is set to CODE[1:0] (no
change during operation).
The procedure of the state transition is:
1. 00 -> 01 -> 10 -> 11 : Write in this order.
2. Same values in CODE[1:0].
3. Different operations (access or read other registers for RAM diagnosis, or continuous write in the
different order other than the above) within the procedure will be invalid.
Note:
The key code process will be continued even if any access to the registers in the RAMECC is made in the
procedure.
[bit5 to bit2] Reserved
Reserved bits. These bits read out "0". At writing, write "0".
[bit1, bit0] CODE1, CODE0: RAM diagnosis/initialization control bits
These bits specify operational direction for the key code procedure above.
CODE1, CODE0
Function
00
Forced termination
01
Initialization start
10
Diagnosis start
11
Setting prohibited
If this value is changed or set to "11" during operating the key code above, the key code procedure itself
will be invalid.
MB91520 Series
MN705-00010-1v0-E
2143