Fujitsu FR81S User Manual
CHAPTER 51: TIMING PROTECTION UNIT
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : TIMING PROTECTION UNIT
FUJITSU SEMICONDUCTOR CONFIDENTIAL
9
4.3. TPU Access Violation Status Register : TPUVST
The bit configuration of TPU access violation status register is shown below.
TPUVST : Address 0906
H
(Access : Byte, Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Reserved
IULST
ULVST
AVST
Initial value
0
0
0
0
0
0
0
0
Attribute
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R/W
R/W
R/W
An illegal access to the TPU register is detected, and the factor is maintained. When an illegal access to the
register is detected, the corresponding bit of the detected violation is set, and it is processed as an illegal
instruction exception.
Writing to this register is permitted only at the privileged mode.
[bit7 to bit3] (Reserved) : (Reserved bit)
These bits are reserved bits. When writing to those bits, 0 must be set. The readout value is always 0.
[bit2] IULST (Illegal Unlock Access Status) : Illegal unlock operation detection
When an illegal unlock access is detected, it becomes one. Writing to this bit is effective only value 0.
It detects in the TPUUNLOCK register in a privileged mode at the access prohibition to the TPU control
register and the values other than the set value are detected in UNLOCK as illegal unlock operation when
writing it (Include it excluding the word access).
[bit1] ULVST (Unlock Access Violation Status) : Control register access violation detection while
access prohibiting
When writing in TPU control register (TPUCFG, TPUTCN1n) is detected while prohibiting the TPU control
register access, this bit becomes 1. Only when 0 is written, it becomes effective.
When the writing operation to TPUCFG, TPUTCN1n is detected in a privileged mode while the TPU
control register prohibition, it detects it as an access violation.
[bit0] AVST (Access Violation Status) : Access violation detection
When the access violations other than IULST and ULVST are detected, this bit becomes 1. Only when 0 is
written, it becomes effective. It concretely becomes a register access by the instruction fetch.
MB91520 Series
MN705-00010-1v0-E
2176