Fujitsu FR81S User Manual
APPENDIX
A. I/O Map
FUJITSU SEMICONDUCTOR LIMITED
APPENDIX
FUJITSU SEMICONDUCTOR CONFIDENTIAL
33
Address
Address offset value / Register name
Block
+0
+1
+2
+3
001778
H
SCR1/(IBCR1) [R/W]
B,H,W
0--00000
SMR1[R/W] B,H,W
000-00-0
SSR1[R/W] B,H,W
0-000011
ESCR1/(IBSR1)[R/W]
B,H,W
00000000
Multi-UART1
*1 Byte access is
possible only for
access to lower 8
bits.
*2 Reserved
because I
2
C mode
is not set
immediately after
reset.
*3 Reserved
because CSIO
mode is not set
immediately after
reset.
*4 Reserved
because LIN2.1
mode is not set
immediately after
reset.
00177C
H
― /(RDR11/(TDR11))[R/W] H,W
-------- -------- *3
RDR01/(TDR01)[R/W] B,H,W
-------0 00000000 *1
001780
H
SACSR1[R/W] B,H,W
0----000 00000000
STMR1[R] B,H,W
00000000 00000000
001784
H
STMCR1[R/W] B,H,W
00000000 00000000
― /(SCSCR1/SFUR1)[R/W] B,H,W
-------- -------- *3 *4
001788
H
― /(SCSTR31)/
(LAMSR1)
[R/W] B,H,W
-------- *3
― /(SCSTR21)/
(LAMCR1)
[R/W] B,H,W
-------- *3
― /(SCSTR11)/
(SFLR11)
[R/W] B,H,W
-------- *3
― /(SCSTR01)/
(SFLR01)
[R/W] B,H,W
-------- *3
00178C
H
―
― /(SCSFR21)[R/W]
B,H,W
-------- *3
― /(SCSFR11)
[R/W] B,H,W
-------- *3
― /(SCSFR01)
[R/W] B,H,W
-------- *3
001790
H
―/(TBYTE31)/
(LAMESR1)
[R/W] B,H,W
-------- *3
―/(TBYTE21)/
(LAMERT1)
[R/W] B,H,W
-------- *3
―/(TBYTE11)/
(LAMIER1)
[R/W] B,H,W
-------- *3
TBYTE01/(LAMRID1)
/
(LAMTID1)
[R/W] B,H,W
00000000
001794
H
BGR1[R/W] H,W
00000000 00000000
― /(ISMK1)[R/W]
B,H,W
-------- *2
― /(ISBA1)[R/W]
B,H,W
-------- *2
001798
H
FCR11[R/W]
B,H,W
---00100
FCR01[R/W]
B,H,W
-0000000
FBYTE1[R/W] B,H,W
00000000 00000000
00179C
H
FTICR1[R/W] B,H,W
00000000 00000000
―
―
MB91520 Series
MN705-00010-1v0-E
2243