Fujitsu FR81S User Manual
APPENDIX
A. I/O Map
FUJITSU SEMICONDUCTOR LIMITED
APPENDIX
FUJITSU SEMICONDUCTOR CONFIDENTIAL
42
Address
Address offset value / Register name
Block
+0
+1
+2
+3
0018E0
H
SCR10/(IBCR10)
[R/W] B,H,W
0--00000
SMR10[R/W] B,H,W
000-00-0
SSR10[R/W] B,H,W
0-000011
ESCR10/(IBSR10)
[R/W] B,H,W
00000000
Multi-UART10
*1 Byte access is
possible only for
access to lower 8
bits.
*2 Reserved
because I
2
C mode
is not set
immediately after
reset.
*3 Reserved
because CSIO
mode is not set
immediately after
reset.
*4 Reserved
because LIN2.1
mode is not set
immediately after
reset.
0018E4
H
― /(RDR110/(TDR110))[R/W] H,W
-------- -------- *3
RDR010/(TDR010)[R/W] B,H,W
-------0 00000000 *1
0018E8
H
SACSR10[R/W] B,H,W
0----000 00000000
STMR10[R] B,H,W
00000000 00000000
0018EC
H
STMCR10[R/W] B,H,W
00000000 00000000
― /(SCSCR10/SFUR10)[R/W] B,H,W
-------- -------- *3 *4
0018F0
H
― /(SCSTR310)/
(LAMSR10)
[R/W] B,H,W
-------- *3
― /(SCSTR210)/
(LAMCR10)
[R/W] B,H,W
-------- *3
― /(SCSTR110)/
(SFLR110)[R/W]
B,H,W
-------- *3
― /(SCSTR010)/
(SFLR010)[R/W]
B,H,W
-------- *3
0018F4
H
―
― /(SCSFR210)
[R/W] B,H,W
-------- *3
― /(SCSFR110)
[R/W] B,H,W
-------- *3
― /(SCSFR010)
[R/W] B,H,W
-------- *3
0018F8
H
―/(TBYTE310)/
(LAMESR10)
[R/W] B,H,W
-------- *3
―/(TBYTE210)/
(LAMERT10)
[R/W] B,H,W
-------- *3
―/(TBYTE110)/
(LAMIER10)
[R/W] B,H,W
-------- *3
TBYTE010/(LAMRID
10)/(LAMTID10)
[R/W] B,H,W
00000000
0018FC
H
BGR10[R/W] H, W
00000000 00000000
― /(ISMK10)[R/W]
B,H,W
-------- *2
― /(ISBA10)[R/W]
B,H,W
-------- *2
001900
H
FCR110[R/W]
B,H,W
---00100
FCR010[R/W]
B,H,W
-0000000
FBYTE10[R/W] B,H,W
00000000 00000000
001904
H
FTICR10[R/W] B,H,W
00000000 00000000
―
―
MB91520 Series
MN705-00010-1v0-E
2252