Fujitsu FR81S User Manual
FUJITSU SEMICONDUCTOR LIMITED
CONTENTS
FUJITSU SEMICONDUCTOR CONFIDENTIAL
CHAPTER 23: 32-BIT INPUT CAPTURE ........................................................................................... 877
1.
O
VERVIEW
.................................................................................................................................. 878
2.
F
EATURES
................................................................................................................................... 879
3.
C
ONFIGURATION
.......................................................................................................................... 880
4.
R
EGISTERS
................................................................................................................................. 881
4.1.
Input Capture Data Register : IPCP............................................................................... 883
4.2.
Input Capture Control Register : ICS ............................................................................. 884
4.3.
LIN SYNCH FIELD Switching Register : LSYNS ........................................................... 885
4.4.
Cycle Measurement Data Register : MSCY .................................................................. 886
4.5.
Cycle and Pulse Width Measurement Control Register (Upper bit) : MSCH ................ 887
4.6.
Cycle and Pulse Width Measurement Control Register (Lower bit) : MSCL ................. 889
5.
O
PERATION
................................................................................................................................. 890
5.1.
Capture and Interrupt Timings ....................................................................................... 891
5.2.
Edge Detection Specifications for Input Capture And Their Operations ........................ 892
5.3.
Cycle and Pulse Width Measurement Operation ........................................................... 894
6.
S
ETTING
...................................................................................................................................... 898
7.
Q&A ........................................................................................................................................... 899
7.1.
Effective Edge Polarity of External Input: Types and How to Select? ........................... 900
7.2.
How to Enable External Input Pins (ICU4 to ICU9)? ..................................................... 901
7.3.
About Interrupt Related Registers ................................................................................. 902
7.4.
About Interrupt Types..................................................................................................... 903
7.5.
How to Enable Interrupt? ............................................................................................... 904
7.6.
How to Measure the Pulse Width of the Input Signal? .................................................. 905
7.7.
How to Set the Setting of the Operation Mode? ............................................................ 906
8.
S
AMPLE
P
ROGRAM
...................................................................................................................... 907
9.
N
OTES
........................................................................................................................................ 908
CHAPTER 24: 16-BIT FREE-RUN TIMER ......................................................................................... 909
1.
O
VERVIEW
.................................................................................................................................. 910
2.
F
EATURES
.................................................................................................................................... 911
3.
C
ONFIGURATION
.......................................................................................................................... 912
4.
R
EGISTERS
................................................................................................................................. 915
4.1.
Registers for the Free-run Timer Simultaneous Activation ............................................ 916
4.1.1.
Timer Synchronous Activation Register : (TCGS) ............................................................................... 916
4.1.2.
Timer Synchronous Activation Enable Register : TCGSE .............................................................. 918
4.2.
Registers for the 16-bit Free-run Timer ......................................................................... 919
4.2.1.
Compare Clear Buffer Register : CPCLRB/Compare Clear Register : CPCLR .............................. 919
4.2.2.
Timer Data Register : TCDT0 to TCDT2 .............................................................................................. 921
4.2.3.
Timer State Control Register : TCCS0 to TCCS2 ............................................................................... 923
4.3.
Register for the Free-run Timer Selector ....................................................................... 931
4.3.1.
Free-run Timer Selection Register : FRS ............................................................................................. 931
5.
O
PERATION
................................................................................................................................. 943
5.1.
Interrupt for the 16-bit Free-run Timer ........................................................................... 944
5.2.
Operation of the 16-bit Free-run Timer .......................................................................... 945
5.2.1.
Timer Clear ............................................................................................................................................... 945
5.2.2.
Timer Mode............................................................................................................................................... 946
5.2.3.
Compare Clear Buffer ............................................................................................................................. 947
5.2.4.
Timer Interrupt .......................................................................................................................................... 949
5.2.5.
Interrupt Mask Function .......................................................................................................................... 950
5.2.6.
Selected External Count Clock .............................................................................................................. 952
5.3.
Operation of the Free-run Timer Selector ...................................................................... 953
5.4.
Notes on Operating Specifications ................................................................................ 955
5.4.1.
Notes at Accessing the Buffer Registers .............................................................................................. 955
5.4.2.
Notes on Using the 16-bit Free-run Timer ............................................................................................ 955
5.4.3.
Notes on Using the Free-run Timer Selector ....................................................................................... 956
CHAPTER 25: 16-BIT OUTPUT COMPARE ...................................................................................... 957
1.
O
VERVIEW
.................................................................................................................................. 958
MB91520 Series
MN705-00010-1v0-E
(21)