Fujitsu FR81S User Manual
CHAPTER 8: DMA CONTROLLER (DMAC)
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : DMA CONTROLLER (DMAC)
FUJITSU SEMICONDUCTOR CONFIDENTIAL
29
Transfer Source Address and the Transfer Destination Address Setting
Set the transfer source address (to be used when the transfer starts) using the DSARn:DSA.
Set the transfer destination address (to be used when the transfer starts) using the DDARn:DDA.
Align the transfer source and destination addresses based on the transfer size (DCCRn:TS), and ignore the
lower 1 bit or lower 2 bits for 16-bit or 32-bit transfer size respectively.
Transfer Count Setting
Set the number of times of block transfer (repeated to the end of transfer) using the DTCRn.DTC. The
transfer count can be 1 to 65535 times. The DMAC transfers data (1 block data), whose length in bytes is
set by the transfer size and block size (see " Transfer Size and Block Size Setting") for the specified
number of times.
Channel Operation Enable
Set the channel operation control using the DCCRn:CE.
⋅
Disable the channel operation (DCCRn:CE = 0)
⋅
Enable the channel operation (DCCRn:CE = 1)
When the software is selected at the transfer request source and when the DCCRn:CE bit is set, the channel
operation is enabled and data transfer is started.
Interrupt Enable Setting
Enable an interrupt during abnormal completion, using the DCCRn:AIE.
⋅
Disable an abnormal completion interrupt (DCCRn:AIE = 0)
⋅
Enable an abnormal completion interrupt (DCCRn:AIE = 1)
Using the DCCRn:SIE, enable an interrupt to occur if data transfer is suspended by a transfer stop request.
⋅
Disable a transfer suspend interrupt during detection of transfer stop request (DCCRn:SIE = 0)
⋅
Enable a transfer suspend interrupt during detection of transfer stop request (DCCRn:SIE = 1)
Enable an interrupt during normal completion, using the DCCRn:NIE.
⋅
Disable a normal completion interrupt (DCCRn:NIE = 0)
⋅
Enable a normal completion interrupt (DCCRn:NIE = 1)
Transfer Request Source setting
Set the transfer request source to accept a transfer request using the DCCRn:RS.
⋅
Request by software (DCCRn:RS = 00)
⋅
Request by an interrupt (DCCRn:RS = 01)
Transfer Mode Setting
Set the DMA transfer mode using the DCCRn:TM.
⋅
Block transfer (DCCRn:TM = 00)
⋅
Burst transfer (DCCRn:TM = 01)
MB91520 Series
MN705-00010-1v0-E
328