Fujitsu FR81S User Manual
CHAPTER 11: I/O PORTS
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : I/O PORTS
FUJITSU SEMICONDUCTOR CONFIDENTIAL
50
5.1.2. Peripheral Input Assignment
The peripheral input assignment is shown below.
Preparation
⋅
Since the pin will once function as a port as the result of step (1), set the DDR and PDR values in
advance if necessary.
⋅
For a pin with the AD converter function, set the applicable bit in the analog input enable register
(ADER) of the AD converter to "Port I/O mode". For information on the setting method, see
"CHAPTER: A/D CONVERTER".
(1)Set the PFR of the applicable pin to enable the port function.
(2)Disable the EPFRs for all other peripherals to be used by the relevant pin.
(3)An addition, if the relevant peripheral has the I/O relocation function, set the EPFR of the relevant
peripheral.
(4)Set the DDR for input.
Figure 5-3 Peripheral Input Assignment Procedure
EPFR
PFR
Peripheral
output value
External bus
Output value
Pin
PDR
Peripheral I/O
direction control
External bus I/O
direction control
Input I/O relocation selection circuit
To input I/O relocation selection circuit
DDR
To peripheral
input value
To external bus input value
PDDR
EPFR
Input value from each pins
To peripheral input value
(1)
(2)
(3)
(4)
MB91520 Series
MN705-00010-1v0-E
445